News Article
Lattice Begins Shipping MachXO3 FPGAs
Lattice Semiconductor Corporation has announced it has begun first shipments of the XO3-L 2200, 4300, and 6900 devices in the 256-Ball caBGA package, the first devices in the ultra-low density MachXO3™ Field Programmable Gate Array (FPGA) family.
Lattice say it is the world's smallest, lowest-cost-per-I/O programmable platform aimed at expanding system capabilities and bridging emerging connectivity interfaces using both parallel and serial I/O.
First announced just 3 months ago, the MachXO3 family puts affordable innovation into the hands of system architects by simplifying the implementation of evolving connectivity interfaces such as MIPI, PCIe, GbE, and others by matching advanced, small-footprint packaging with on-chip resources.
"What matters to us is size, cost and low-power consumption without compromising performance," said Devrin Talen, Systems Design Engineer at Vuzix Corp. "Lattice's MachXO3 devices have the right mix of LUT count, power consumption and I/Os needed to architect MIPI bridges that are capable of the high bandwidth and resolution requirements of our virtual and augmented reality systems."
The new uWatt power FPGA family provides a logic density range from 640-to-22K logic-cells. The family makes use of the latest in package technology to not only deliver tiny 2.5x2.5mm wafer-level chip-scale packaging, but also 540 I/O count devices, as well as devices with 3.125Gbps SERDES capabilities. The combination of features and more make the MachXO3 family the ideal choice to cover the full spectrum of bridging and interface requirements in consumer, industrial, communications, automotive, and compute markets.
The first samples of the MachXO3 family are supported by an advanced version of Lattice Diamond® software, as well as IP and application expertise both in-house and by third parties.
