How Agentic AI is reshaping semiconductor design

The expanded collaboration between Cadence and NVIDIA signals a new phase in electronic design automation, where AI moves beyond assisting engineers to actively orchestrating complex design workflows. As semiconductor complexity accelerates, agentic AI, digital twins and accelerated computing are converging to redefine how chips, systems and entire AI factories are conceived, verified and optimised. This article is based on an interview with Rob Knoth, Sr Solution Marketing Group Director, Cadence.

The semiconductor industry has always been defined by relentless escalation. Every new generation of processors, networking devices, accelerators and systems presents challenges that could not be solved using the methodologies of the previous generation. From shrinking geometries and rising transistor counts to advanced packaging and heterogeneous integration, engineers have consistently been forced to rethink not only what they build, but how they build it.

Today, that pattern is repeating itself on a much larger scale.

Artificial intelligence has become both the driving force behind next-generation semiconductor infrastructure and the technology transforming the tools used to create it. This dual role is central to how Cadence views the future of engineering: “design for AI” and “AI for design.”

The first concerns enabling customers such as NVIDIA to create increasingly sophisticated AI infrastructure. The second may prove even more transformational, applying the latest AI technologies directly to engineering workflows themselves.

The result is a fundamental shift from traditional automation towards autonomous, agent-driven design environments that promise to deliver unprecedented productivity gains while freeing engineers to focus on innovation rather than administration.

Engineering’s Next Inflection Point
For engineers with decades of experience, the current AI revolution feels both familiar and unprecedented. The semiconductor industry has always evolved through successive waves of technological advancement.

With each generation, engineers have required better tools, faster computation, more sophisticated simulation capabilities and improved collaboration methods to tackle problems that were previously unsolvable.

According to Cadence, what distinguishes the current moment is the extraordinary pace at which AI itself is advancing.

Since the emergence of large language models and generative AI, the technology landscape has evolved at a speed rarely seen in engineering disciplines. Organisations that fail to continuously reassess AI capabilities risk falling significantly behind what is achievable.

This reality has intensified collaboration between EDA vendors and semiconductor leaders. Cadence’s relationship with NVIDIA exemplifies this dynamic. On one side, Cadence provides the design software, IP, hardware platforms and verification infrastructure that enable NVIDIA to develop successive generations of AI accelerators and systems. On the other, Cadence is incorporating NVIDIA-powered AI technologies directly into its own design platforms.

What emerges is a virtuous cycle: AI infrastructure enables increasingly powerful AI models, which in turn help engineers create the next generation of AI infrastructure.

Beyond Traditional EDA Automation
Automation has always been at the heart of Electronic Design Automation. Indeed, the “A” in EDA has historically referred to simplifying repetitive engineering tasks.

Traditional EDA automation, however, relied heavily on deterministic workflows and rule-based logic. Engineers encoded decision trees, heuristics and predefined actions that software could execute automatically. This approach remains valuable, but its limitations become increasingly apparent as design complexity grows. Agentic AI introduces a fundamentally different model.

Instead of simply executing predefined instructions, AI agents can interpret goals, evaluate outcomes, determine next steps and orchestrate complex workflows with minimal human intervention.

The distinction is significant.
In earlier AI-enhanced workflows, verification tools might automatically launch simulations, generate reports and return log files for analysis. Engineers would still spend considerable time interpreting results, diagnosing failures and determining subsequent actions.

Agentic systems aim to automate much of that loop.

Cadence recently demonstrated an engineering proof of concept developed jointly with NVIDIA in which agentic AI orchestrated a verification workflow around NVIDIA intellectual property. According to the companies, the result delivered a dramatic reduction in runtime, shrinking processes that previously required weeks into workflows measured in days.

While these systems are not yet replacing human engineers, they are demonstrating a new level of workflow autonomy that was previously unattainable.

The significance lies not merely in speed, but in the broader implications for engineering productivity.

The Rise of the Autonomous Engineer
The concept of an “autonomous engineer” may sound futuristic, but industry leaders are careful to distinguish vision from reality.

Fully autonomous chip development remains a distant objective.

Semiconductor design encompasses countless decisions involving architecture, trade-offs, market requirements and innovation that continue to require human expertise. However, the ability to automate substantial portions of verification, implementation and optimisation workflows is already becoming practical.

Cadence’s evolving AI strategy includes platforms such as ChipStack, Verisium and Innovus-related agentic workflows that combine AI agents with traditional EDA environments to produce trusted, verifiable results.

Rather than replacing engineers, these systems function as highly capable collaborators.

This distinction is crucial.

Engineering has traditionally involved significant amounts of “nanny work”: monitoring jobs, restarting failed processes, analysing logs, debugging tool issues and managing computational workflows. Many highly skilled engineers spend substantial portions of their careers performing tasks that contribute little to creative innovation.

Agentic AI targets that burden directly. By eliminating routine monitoring and administrative effort, engineers can devote greater attention to architecture, creative problem solving and system-level innovation.

For an industry facing persistent talent shortages and escalating design complexity, that shift could prove transformative.

Unlocking Human Creativity
The productivity gains associated with agentic AI extend beyond reducing drudgery.

Perhaps the larger opportunity lies in expanding what engineers can accomplish.

Semiconductor systems increasingly involve multiple domains simultaneously, including electronics, software, thermal management, packaging, optics and communications. As these domains converge, identifying relationships and optimisation opportunities becomes more difficult for individuals working within traditional design silos.

Agentic AI offers a mechanism for bridging those gaps.

By integrating multiple tools, datasets and simulation environments, AI agents can help engineers explore interactions that might otherwise remain hidden.

This capability could accelerate breakthroughs in advanced packaging, heterogeneous integration and multi-physics optimisation.

Instead of spending valuable time managing tools, experienced engineers may increasingly focus on discovering new architectural concepts and solving previously inaccessible problems. Such a shift could have important implications for attracting and retaining engineering talent.

Highly creative individuals are often discouraged by repetitive workflow management. Reducing that burden may help ensure that engineering careers remain intellectually rewarding while enabling experienced innovators to remain engaged longer.

Digital Twins Become Strategic Assets
As AI infrastructure scales, digital twins are emerging as a critical component of engineering strategy.

Historically, digital twin technology has been associated with manufacturing and industrial systems. However, the concept is rapidly expanding into semiconductor development and data centre optimisation.

Cadence argues that the methodology underpinning semiconductor design already demonstrates the value of simulation-first development. More than 99% of a semiconductor’s behaviour is typically simulated before fabrication. This allows engineers to identify and correct issues long before expensive manufacturing processes begin.

By comparison, many large-scale physical systems rely on much lower levels of simulation prior to physical testing.

Data centres represent a particularly promising application area.

Unlike semiconductor devices, which remain fixed after fabrication, data centres are dynamic environments. Equipment is continuously upgraded, workloads are redistributed, cooling systems are adjusted and power delivery architectures evolve over time. A high-fidelity digital twin allows engineers and operators to model these changes before implementing them physically.

Combined with accelerated computing and AI-based optimisation, digital twins can improve power utilisation, predict performance bottlenecks and support more efficient infrastructure expansion.

As AI deployments continue to scale globally, these capabilities are becoming increasingly important.

From PUE to Tokens per Watt
The rapid growth of AI infrastructure is also prompting a reassessment of efficiency metrics.

For years, Power Usage Effectiveness (PUE) has served as the standard measure of data centre efficiency. While valuable, PUE primarily measures how effectively a facility converts incoming energy into useful computing power.

Many industry observers now argue that PUE alone does not fully capture the value generated by AI systems. This has contributed to growing interest in metrics such as “tokens per watt” and “tokens per infrastructure dollar.”

The appeal is straightforward.

AI data centres exist to generate intelligence, inference and business outcomes. Measuring how much useful AI output is produced for a given energy or capital investment provides a more direct view of system effectiveness.

Rather than simply minimising energy losses, operators can optimise around the ultimate objective: maximising useful computation within available power constraints.

This perspective encourages more holistic decision-making across compute architecture, cooling technologies, workload scheduling and infrastructure deployment.

For power electronics engineers, such metrics could significantly influence future system design priorities. Power conversion efficiency will remain critical, but evaluation criteria may increasingly incorporate the value generated by every watt consumed.

Accelerated Computing and the Future of EDA
The connection between EDA and accelerated computing continues to deepen.

However, this trend did not begin with AI.

The industry has already navigated previous transitions from single-core processors to multi-core architectures and distributed computing environments. Each transition required new algorithms and software methodologies while delivering corresponding gains in productivity.

Today’s shift toward GPUs and specialised accelerators represents the next stage of that evolution.

According to Cadence, accelerated computing has become inseparable from leading-edge EDA development. Platforms such as NVIDIA’s CUDA provide abstraction layers that enable software developers to exploit rapidly evolving hardware architectures without continuously rewriting application code.

This significantly accelerates innovation while improving performance across a broad range of engineering workloads. Importantly, GPUs represent only one component of a much larger computational ecosystem.

Purpose-built silicon, custom accelerators and specialised hardware architectures will all play roles in supporting future engineering workflows. The challenge lies in matching the right workload to the right computational resource.

As agentic AI becomes more capable, such optimisation may increasingly be performed automatically.

Closing the Sim-to-Real Gap
One of the most compelling areas for future AI development lies beyond semiconductors themselves. Physical AI, including robotics, autonomous vehicles and intelligent machines, depends heavily on accurate simulation.

The challenge is often described as the “sim-to-real” gap: the difference between behaviour observed in simulation and behaviour encountered in the real world. For autonomous vehicles, simulation already enables billions of kilometres worth of synthetic testing across diverse weather conditions, environments and traffic scenarios.

Robotics introduces an even more demanding challenge.

Unlike vehicles, which are often attempting to avoid collisions, robots must interact physically with objects. Grasping, manipulating and assembling components require precise modelling of contact forces, material properties and environmental interactions. This so-called “last millimetre problem” demands substantially higher simulation accuracy.

High-fidelity multi-physics environments are therefore becoming essential for generating the synthetic datasets required to train future AI systems. Without them, scaling robotics beyond limited applications may prove impossible.

For EDA vendors, this creates a natural extension of existing expertise. After all, simulating and optimising complex systems has always been a core competency.

Remaining Challenges
Despite the excitement surrounding agentic AI, significant challenges remain.

Photonics, quantum computing, advanced packaging and heterogeneous systems all present rich opportunities for future development. Each domain introduces unique modelling requirements, physical phenomena and optimisation challenges.

Perhaps most importantly, data quality remains a central concern. AI systems are fundamentally constrained by the datasets on which they are trained. Poor-quality data inevitably limits performance. The semiconductor industry faces a unique challenge in this regard. Unlike consumer AI applications, semiconductor design involves relatively small communities of highly specialised experts. There are not billions of publicly available data points. Instead, critical design knowledge is often proprietary, closely guarded and distributed across numerous organisations.

The volume of publicly accessible semiconductor design data is therefore limited compared with many AI training domains. This raises important questions about how the industry will develop sufficiently rich, high-quality datasets while maintaining IP protection and competitive differentiation. According to Cadence, solving this challenge may become one of the defining stories of AI-driven semiconductor development over the coming decade.

The Road Ahead
Will agentic AI and digital twins become universal across the semiconductor industry?

Probably not.

Engineering has never adopted any single methodology universally. Cost constraints, application requirements and organisational preferences will continue to shape technology choices. Yet the momentum behind these technologies is difficult to ignore. Early adopters are already reporting significant productivity gains, improved quality of results and accelerated development cycles. As competitive advantages become evident, broader industry adoption becomes increasingly likely.

The semiconductor sector has always thrived by expanding the boundaries of what is possible. Agentic AI appears poised to become the next major tool in that pursuit, transforming EDA from a collection of automated utilities into an intelligent engineering partner.

For power electronics professionals, the implications extend far beyond chip design. From data centre power architectures and advanced cooling systems to robotics, autonomous transportation and physical AI, these technologies are reshaping how complex systems are optimised and deployed.

The industry’s next breakthrough may not come solely from better silicon. It may come from creating engineering systems capable of helping engineers imagine what comes next.